High-Speed ADC and DAC Board Design: Clock Jitter, Grounding, Power and Layout That Protect Your SNR

The converter's datasheet is the best you can do

A 14-bit converter promises about 86 dB of signal-to-noise ratio in theory and quotes somewhat less in practice. On a real board you will almost never beat the datasheet; you will lose some of it, and the whole game is how little. The loss comes from four places: the clock, the power supply, the analog path and the layout. Fix them in that order of importance, and measure after each change so that you know which one helped.

Clock jitter sets a ceiling you cannot cross

Sampling at the wrong instant by a tiny amount produces an error proportional to how fast the input is changing. The signal-to-noise ratio that clock jitter alone allows is

SNR = −20 · log10(2π · f_in · t_jitter)

For a 10 MHz input and 1 ps of RMS jitter, that is about 84 dB, already below the 86 dB of an ideal 14-bit converter. At 50 MHz with the same jitter, it falls to about 70 dB. Two consequences follow. The higher the input frequency, the harder the clock requirement, so converters sampling intermediate-frequency signals need exceptional clocks. And a jittery clock cannot be repaired afterwards.

• Use a low-jitter oscillator or a clock cleaner and distribute the clock as a clean, short, controlled-impedance trace, ideally differential, kept away from noisy signals.
• Do not use a clock that is a by-product of a noisy digital block. A clock generated inside an FPGA is convenient and usually noisier than a dedicated source.
• Give the clock its own supply filtering, and a layout with no switching signals beside or beneath it.
• Read the converter's quoted aperture jitter, and add the external clock's contribution in a root-sum-square way.

Power supply noise becomes signal

Converters have finite power-supply rejection, and noise on the analog supply, especially at the frequencies where it falls inside your band, appears in the output. Switching regulators are noisy at their switching frequency and its harmonics, and these are often the spurious tones that show up in the spectrum.

• Power the analog section from low-noise linear regulators, or from a switcher followed by a filter and a low-noise linear stage. Choose the regulator for noise and rejection at your frequencies, not only for efficiency.
• Keep analog and digital supplies separate, joined only at the source and filtered where they meet.
• Decouple every supply pin with the capacitor values the converter's documentation recommends, placed as close as possible, with a short path to the plane. Several values in parallel cover a wider range.
• Check supply noise on the board with an oscilloscope using a short ground spring, not a long clip lead, which measures only its own loop.

Grounding: one good plane and careful placement

The old advice to split the ground into an analog and a digital island, joined at one point, is easy to misapply and frequently makes things worse, because it forces return currents on detours and creates antennas at the splits. The usual better practice on a mixed-signal board is a single, solid ground plane, with the analog and digital parts placed in separate regions so that digital return currents never flow beneath the analog circuitry. Route digital signals only over their own region, and never across a gap in the plane. Follow the converter manufacturer's recommendation for how to treat its pins, since it knows how the part was designed.

The analog input path

• The driver. The converter's input is a switched capacitor that kicks back charge at the sample rate. The amplifier that drives it must settle within a fraction of the sampling period, and the converter's documentation specifies the driver and an RC network that absorbs the kickback. Do not guess these values.
• The anti-alias filter. Anything above half the sample rate folds into your band. A filter in front of the converter, matched to the bandwidth you actually need, is not optional. Its component tolerances and temperature drift affect the flatness of your passband.
• Differential signalling rejects common-mode noise and doubles the usable swing. Keep the pair tightly coupled, matched in length and symmetric, and route it away from clocks and digital lines.
• Range and gain. Use as much of the converter's input range as the signal allows without clipping, since every decibel of unused range is a decibel of lost resolution. A programmable gain stage lets one board handle both weak and strong signals. In our fiber signal communication board, the input range of 10 mV to 1 V is handled by automatic gain control from 0 to 40 dB in 2 dB steps, with 0.1 dB precision, so that the converter works near full scale whatever the source.
• The DAC output needs a reconstruction filter to remove the images around multiples of the sample rate, and an output stage that can drive the load without distortion.

The digital interface to the FPGA

High-speed converters use parallel or serial LVDS or similar interfaces with a clock that travels with the data. Constrain it properly: match the lengths in each group, terminate at the receiver, and write the timing constraints in the FPGA tool so that the setup and hold at the receiving flip-flops are checked and met across voltage and temperature. A capture that works on one board and fails on another is almost always a timing margin problem. Keep the digital outputs' edge rates no faster than needed, and keep their return currents away from the analog side. We use a Lattice FPGA on that fiber board to handle a 14-bit, 80 MSPS converter and a 16-bit, 50 MSPS converter, which is a typical division of labour: the FPGA moves and processes data at fixed timing, and the analog design decides how clean the data is.

Layout rules that pay off

• Place the converter first, then its clock, then its decoupling, then the input driver, and build outward from there.
• Keep the analog input short and away from the digital outputs, the clock and any switching regulator.
• Do not run digital signals under the analog section, and avoid vias that cut the return path of sensitive signals.
• Use a four-layer board at least, with a continuous ground plane beneath the signal layer; add layers for power distribution and shielding when the performance demands it.
• Keep connectors and cables in mind: a long, unshielded cable is an antenna, and the input connector is where most external noise enters.
• If the board is placed in an enclosure with radios or motors, test it there, because the environment is part of the noise budget.

Measure the result

Acquire a clean sine wave from a good source at a frequency chosen to be coherent with the sample rate, so that the FFT of the capture shows the tone in a single bin with no leakage. From the spectrum, read the signal-to-noise ratio, the signal-to-noise-and-distortion ratio and the effective number of bits, plus the spurious tones. Then compare the numbers with the datasheet, change one thing at a time, and watch which change moves them. A tone at a fixed frequency usually names its source: a switching regulator, a clock harmonic or a digital signal. Compare with the input shorted, to separate the noise the board adds from the noise in the source. We did exactly this on our fiber board, which reaches a signal-to-noise ratio above 50 dB over a 1000 m link.

Where we can help

We design mixed-signal boards, from the analog front end to the FPGA and the firmware that processes the data. See our hardware design service and our guide to the hardware design process.