pcb design review checklist

    PCB Design Review Checklist: What to Check Before You Send the First Spin to Fabrication

    A practical pre-fabrication checklist for a first PCB spin: schematic and power review, footprint and library checks, stackup and impedance, placement and routing, manufacturing and assembly rules, test access and the files you hand to the fabricator.

    ·XTELL Engineering Team

    A review costs hours, a respin costs weeks

    Most respins are caused by a small number of mistakes that a careful second pair of eyes would have caught: a swapped pin on a connector, a footprint that is mirrored, a strap pin left floating, a power rail that cannot supply what the load needs. A first spin is also the cheapest moment to find them. This checklist is the one we run before releasing a board, ordered so that each pass removes a class of problem before the next begins. It applies to any tool; we design in open-source EDA such as KiCad as well as others.

    1. Schematic review

    • Power tree. Every rail, its source, its maximum load and its margin. Check input range, dropout, start-up order and what happens at brown-out. Confirm the regulator can supply the peak current, not the average.
    • Every pin of every active part, against the datasheet, not against a library symbol. Unused inputs tied or pulled, outputs not shorted together, open-drain lines pulled up to the right rail.
    • Boot and strap pins. Their state at reset decides how the processor starts. Verify the resistor values give a defined level and that no other circuit overrides them during reset.
    • Reset, enable and power-good chains. A defined power-up order, with no line that floats before its driver is alive.
    • Voltage levels across every interface. A 3.3 V output into a 1.8 V input, or a part whose inputs are not 5 V tolerant, damages silicon.
    • Pull-ups and addresses on I2C buses, address collisions, and the pull-up rail.
    • Protection. ESD on every connector, reverse polarity and over-current where users can make mistakes, and the right clamp voltage for the rail it protects.
    • Connectors against their mating parts. Pin 1 position, row order, mirrored numbering on a cable assembly. Draw the mating side.
    • Decoupling, one capacitor per supply pin, with the value and package the part's guidance asks for.

    2. Library and footprint verification

    A wrong footprint is a dead board, and a library symbol that does not match the datasheet is a common source of one.

    • Check each footprint against the manufacturer's land pattern and the actual package drawing, including pad size, pitch, pin 1 mark and the exposed pad.
    • For connectors, check the mechanical holes, the pin order as seen from the right side, and whether the part is the exact orderable variant.
    • Print the layout at 1:1 on paper and place real components on it. It is the cheapest way to find a footprint or an orientation error.

    3. Stackup and impedance

    • Choose the layer count and the stackup with the fabricator, using the thicknesses they really use, and have them confirm the trace width and spacing that give the impedance you need.
    • List every controlled-impedance net (USB, Ethernet, memory buses, high-speed serial, clocks) with its target impedance and the reference plane it follows.
    • Check that every high-speed signal has a continuous reference plane beneath it and does not cross a split or a gap.

    4. Placement and routing

    • Decoupling capacitors close to the pins they serve, with short, wide connections to the plane: the inductance of the path matters more than the capacitor value.
    • Return paths. For each fast signal, ask where the return current flows. Layer changes need a nearby stitching via on the reference plane.
    • Length matching for buses that need it, with the right tolerance, measured through vias and connectors.
    • Power and thermal. Trace widths and via counts for the current, copper area for dissipating parts, thermal vias under exposed pads, and distance between heat sources and sensitive analog or crystal circuits.
    • Crystals and analog front ends. Short traces, no noisy signal underneath or alongside, a clean ground reference.
    • Antennas and RF. Follow the module's keep-out rules exactly, with no copper under the antenna.
    • Mechanical fit. Import the enclosure outline, check the board outline, mounting holes, connector positions and component height against the case, with the clearance the assembly needs.

    5. Manufacturability and assembly

    • Run the fabricator's design rules for minimum trace and space, annular ring, drill size, copper to edge and solder mask bridges between fine-pitch pads. Do not rely only on your own tool's default rules.
    • Via-in-pad, microvias and blind or buried vias add cost and lead time; confirm they are really needed.
    • Add fiducial marks, polarity marks and a clear reference designator on the silkscreen, outside the pads.
    • For fine-pitch and BGA parts, check the fan-out, the stencil aperture and whether the assembler can reflow and inspect them. Leave room for rework where it is plausible that a part will be replaced.
    • Panelisation, tooling holes and edge clearance for the assembly line, and a keep-out for anything that touches a conveyor or a depanelling tool.

    6. Design for test and bring-up

    • Test points on every power rail, on reset, on the main clocks and on the debug and programming interfaces.
    • A debug header or pads for the programming interface, and a serial console that is reachable on the finished board.
    • Zero-ohm links or footprints in places that let you isolate a rail or a block on the first board.
    • A written bring-up plan: power up with a current-limited supply, check each rail before the next, then clocks, reset, programming, then peripherals one at a time. The review should leave you able to do this without guessing.

    7. Bill of materials and the manufacturing data

    • Every line has a manufacturer part number, a package, and at least one approved alternative where supply is a risk. Check the lifecycle status and stock of the critical parts before the layout is final.
    • The BOM, the placement file and the schematic agree about values, packages and which parts are fitted or left unfitted.
    • Generate the fabrication outputs, then open them in an independent viewer, not the design tool. Check the layer count, the board outline, the drill file, the solder mask and silkscreen openings and that nothing is missing or mirrored. Most fabricators will also run a manufacturability check; read their report instead of only receiving it.

    How we use it

    We run a review of this kind on every board, with a second engineer who did not do the layout, and we normally build more than one revision on the way to a production design. Our RK3128 mainboard project went through several PCB versions with a separate display driver board, and the review notes from each spin fed the next. For the wider process from schematic to fabrication, see our guide to the hardware design process, and for what we offer, our PCB design and PCB prototyping services.

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